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Open Access | Proof on August 24, 2026

Energy-Efficient Ferroelectric FeFET Architectures: A Sustainable Solution for Low-Carbon ICT Systems

Gajula Ramana Murthy
Abstract

The exponential growth of Information and Communication Technology (ICT), which already accounts for ~10% of global electricity consumption, demands ultra-low-power semiconductors and has the potential to align with decarbonization goals and sustainability targets. This study optimizes Hafnium Zirconium oxide (Hf₀.₅Zr₀.₅O₂)-based ferroelectric field-effect transistors (FeFETs) using 2D TCAD simulations of a metal-ferroelectric-insulator-semiconductor (MFIS) structure. The optimized device exhibits steep-subthreshold switching and low-voltage operation, indicating the potential for an ideal device-level dynamic power reduction of up to 75% through supply-voltage scaling, while the non-volatile ferroelectric state enables near-zero standby power at the memory-device level. Under the representative operating assumptions adopted in this study, these device-level improvements suggest the potential for reduced operational energy consumption in data-center memory workloads. Consequently, the proposed HZO-based FeFET architecture may contribute to lower ICT-related carbon emissions, although the reported sustainability benefits should be interpreted as scenario-based analytical estimates rather than deployment-specific predictions.

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Keywords
green computing, non volatile memeory, TCAD simulation, low power electronics, ICT, semiconductor devices, ferroelectric reliability